CISC / RISC / EPIC

Classification of Microprocessors

1.    CISC Processors: CISC is known as Complex Instruction Set Computer. The CISC approach attempts to minimize the number of instructions per program, sacrificing the number of cycles per instruction. Computers based on the CISC architecture are designed to decrease the memory cost. The number of instructions per program can be reduced by embedding the number of operations in a single instruction, thereby making the instructions more complex. For example, MUL(Multiply). It performs operations such as load from memory, an arithmetic operation and a memory store all in single instruction.

Example: IBM 370/168, Intel 80486 etc.

Advantages:

a.     Microprogramming is as easy as assembly language to implement and much less expensive than hardwiring a control circuit.

b.     Fewer instructions are needed to implement a particular computing task, which led to lower memory use for program storage and fewer time consuming instructions.

2.    RISC Processors: It is also known as Reduced Instruction Set Computing. As memory speed increased and HLL replaced assembly language, the major reasons for CISC began to disappear. One of their key realization was that a sequence of simple instructions produces the same results as a sequence of complex instructions but can be implemented with a simple and fast hardware design. RISC is a type of microprocessor that uses highly optimized set of instructions.

Advantages:

a.     Simple instructions are used in RISC architecture.

b.     Most instructions complete in one machine cycle, which allows the processor to handle several instructions at the same time.

c.     The amount of work that a computer can perform is reduced by separating “LOAD” and “STORE” instructions.

d.     Since RISC processors are simpler than corresponding CISC processors, they can be designed more quickly.

CISC vs RISC

	CISC	RISC
1.	Large number of instructions	Reduced number of instructions
2.	Emphasis is done on hardware	Emphasis is done on software
3.	Memory to memory “LOAD” & ”STORE” incorporated in instruction	Register to register “LOAD” & ”STORE” are independent instructions.
4.	Spend fewer transistors on registers	Spend more transistors on register
5.	Processor is difficult to design	Processor is easier to design
6.	These processors are slower	These processors are faster
7.	The size of program is small	Programs are large I size

3.    EPIC (Explicitly Parallel Instruction Computing): It is a 64-bit microprocessor instruction set, jointly defined and designed by Hewlett Packard and Intel, that provides up to 128 general and floating-point unit registers and uses speculative loading, predication, and explicit parallelism to accomplish its computing tasks. By comparison, current 32bit CISC and RISC microprocessor architectures depend on 32-bit registers, branch prediction, memory latency, and implicit parallelism, which are considered a less efficient approach in micro architecture design.